Teams at Bolt Graphics

Lead definition of data-parallel GPU microarchitecture, drive tradeoffs for performance/power/area, define memory hierarchy and coherency, perform performance modeling and workload analysis (C/C++/SystemC), collaborate across RTL, verification, physical design, firmware/software and systems teams, support silicon bring-up, debug and post-silicon optimization, and contribute to long-term product roadmap.

Design and implement RTL and microarchitectural components for SoC/IP using SystemVerilog/Verilog. Optimize PPA, collaborate with verification and physical design teams, support integration, timing closure, simulation, GLS, and silicon bring-up, and contribute to design documentation and reviews.

Lead SoC Architect responsible for defining top-level SoC architecture, subsystem partitioning, and tradeoffs. Drive performance modeling and workload analysis, specify interfaces and microarchitecture, integrate third-party IP, collaborate across RTL/verification/physical/firmware/software teams, and support silicon bring-up, debugging, tuning and long-term roadmap planning.